EE Times Europe reports on Silicon Capacitors as new solutions for decoupling applications.

“As consumers are eager to get the most cutting-edge products, manufacturers have to adapt their technologies and continue to drive innovations to offer the most advanced electronic equipment.

Two key features must often be considered for electronic devices: size and performance. In order to anticipate the demand for more miniaturization and signal integrity over a wide range of frequencies in the decoupling applications, IPDiA adds to its silicon passive component library some ultra low ESR/ESL structures, in low profile form factor. These new silicon capacitors enable to drastically decrease the overall impedance and offer the best solution for decoupling performances up to 10 GHz frequency range.”

A Mosaïc PICS capacitor design that can be embedded in a PCB.

Read the full article on page 32 of our January digital edition or download the PDF of this article directly here

Fraunhofer IPMS-CNT is developing new materials and processes for future generations of PICS in the EU project PICS for IPDIA together with CEA/Leti, Sentech and Picosun. Read more in a previous blog post here.